पूर्वोत्तर क्षेत्रीय विज्ञान एवं प्रौद्योगिकी संस्थान   
North Eastern Regional Institute of Science and Technology 
deemed-to-be-university under the Ministry of Education, Govt. of India
Nirjuli - 791109, Arunachal Pradesh 
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faculties

Dr. Ashok Kumar Ray

Assistant Professor

Semiconductor device, design, development and modelling. GaN and SiC based device. VLSI Technology

e-mail:akr[AT]nerist(dot)ac(dot)in , Phone(EPBX/Office):0360-2257401-8 extn. 7108

  • Professional Background
  • Educational Qualification
  • Memberships in Professional bodies
  • Teaching Engagements
  • Projects and Thesis Supervised/ Currently Supervising
  • Participation in short term courses
  • Courses or Conferences Organised
  • Special Lectures Delivered
  • Publications
From(Date of Joining) To Designation Organisation Nature of Association
30.07. 2004 30.06.2005 Lecturer St. Margaret Engg. College,Neemrana-301705 Rajasthan Technical University,Jaipur  
11.07.2005 29.06.2006 Lecturer Krishna Engg. College, Mohan Nagar, Ghaziabad,UPTU, Lucknow  
03.07.2006 Till date Assistant Professor NERIST,Nirjuli,Arunacahal
Pardesh-791109
Regular
Degree Subject University Year
Bachelor’s Degree ECE NEHU 2002
Master’s Degree Microelectronics IIT Bombay 2012
PhD III-V Semiconductors IIT Guwahati 2021
  1. Life time member ISTE, Member IEE, Associate Member IEI
Title Course Code Module Semester
VLSI Tech & Solid State Circuits EC-7102 MTech I
VLSI Tech & Semiconductor Modelling VL7100 MTech I
Digital IC and System Design VL7201 MTech II
Microelectronics EC5101 Degree I
Introduction to VLSI Design EC5200 Degree II
Digital Circuits and Design EC4100 Diploma I
Electronic Circuits and Devices III EC4101 Diploma I
Electronic Engg Materials EC3202 Diploma II
Electronic Circuits and Devices EC2100 Base I
Electronics Workshop II EC2151 Base I
Title of Project Names of Students
A comparative study on Digital Audio Watermarking Algorithm based on FFT-SVD and DWT-SVD Yogita Sonowal
8 – bit 1 – Gsps Flash ADC for Optical Communication Receivers Sarfraz Hussain
VLSI implementation of DWT for jpeg 2000 image standard Pragyan Jyoti Bora
On Chip Antenna Chandani Pandey
FPGA implementation of conjugate gradient solver Shreyasee Debnath
FPGA implementation of Jacobi solver Manaswi Tamuli
Course Name Sponsored By Date
Course: Appropriate Technologies for Rural Development. TEQIP-(MHRD-World Bank Project) organised by Dept. of Mechanical Engg. NERIST, Arunachal Pradesh. 25th -29th August, 2014
Course: Prospects of Cloud Computing in Education. TEQIP(MHRD-World Bank Project) organised by Dept. of CSE, NERIST, Arunachal Pradesh. 3rd -7th February ,2104
Course: Optical Techniques and Devices in Scientific and Engineering System Applications. TEQIP-(MHRD-World Bank Project) Jointly organised by Dept. of Physics & Dept. of Electrical Engg. NERIST, Arunachal Pradesh. 28th October to 1st November 2013
Course: Advances in Computer Science and Information Technology. TEQIP-(MHRD-World Bank Project) organised by Dept. of CSE, NERIST, Arunachal Pradesh. 26th -30th August, 2013
Course: Ergonomics and Safety in Product Design. TEQIP-(MHRD-World Bank Project) organised by Dept. of Agricultural Engg. NERIST, Arunachal Pradesh. 14th -18th May, 2013
Course: Advances in Networking Technologies. TEQIP-(MHRD-World Bank Project) organised by Dept. of CSE, NERIST, Arunachal Pradesh. 29th April to 3rd May 2013
Workshop: Xilinx FPGA Architecture & Design Flow 2013. Dept. of EEE, IIT Guwahati, Assam. 22nd - 23rd November 2013.
Course: Stress Management. TEQIP-(MHRD-World Bank Project) Jointly organised by Dept. of ECE and CMS NERIST, Arunachal Pradesh. 4th -6th November, 2013
Course: Emerging Research Issue in Speech and Natural Language Processing. TEQIP-(MHRD-World Bank Project) organised by Dept. of CSE, NERIST, Arunachal Pradesh. 30th Sep. to 4th Oct., 2014
Workshop: 20th INUP Hands-on Training on Nanofabrication Technologies. INUP, IIT Bombay, Mumbai; Maharashtra. 24th – 28th June , 2013
Workshop: Advances in Document Analysis and Retrieval Jointly Organised by ISI, Kolkata and Gauhati University, Guwahati, Assam 7th -11th March, 2013
Workshop: Patient Searching and Drafting. IPR Cell IIT Bombay, Mumbai; Maharashtra 31st March -1st April 2012.
Workshop: Frontiers of Excellence in Photovoltaic Science & Technologies IIT Bombay, Mumbai; Maharashtra 15th -17th Jan 2012
Workshop: Intellectual Property Rights Fundamentals. IPR Cell IIT Bombay, Mumbai; Maharashtra. (six weekends course) 27th Aug – 15th Oct, 2011
Course Name Sponsored By Date
Organized 6 days TEQIP Course on Recent Advances in Signal Processing and Semiconductor Devices TEQIP-(MHRD-World Bank Project) 24-29th Jan 2014
Title Sponsored By Date
Organized 6 days TEQIP Course on Recent Advances in Signal Processing and Semiconductor Devices TEQIP-(MHRD-World Bank Project) 24-29th Jan 2014
Journal:
  1. Ashok Ray, Rajashree Nori, Piyush Bhatt, Saurabh Lodha, Richard Pinto, Valipe Ramgopal Rao, and François Jomard, Michael Neumann-Spallart, "Optimization of a Plasma Immersion Ion Implantation Process for Shallow Junctions in Silicon,"  Journal of Vacuum Science & Technology A, 32, 061302 (2014), DOI:http://dx.doi.org/10.1116/1.4896756
  2. Dheeraj Kumar  Sinha, M. Salahuddin Ansari, Ashok Ray, Gaurav Trivedi, Amitabh Chatterjee and Ronald D. Schrimpf, "Fast Ionization-Front-Induced Anomalous Switching Behavior in Trigger Bipolar Transistors of Marx-Bank Circuits Under Base-Drive Conditions," in IEEE Transactions on Plasma Science, vol. 46, no. 6, pp. 2064-2071, June 2018, DOI: 10.1109/TPS.2018.2835465.
  3. Ashok Ray, Sushanta Bordoloi , Biplab Sarkar, Pratima Agarwal, Gaurav Trivedi, "Numerical Simulation of Enhanced-Reliability Filleted-Gate AlGaN/GaN HEMT", J. Electro. Mater., 2020, 49, (3), pp. 2018–203
  4. L. Arivazhagan, D. Nirmal, P. Pavan Kumar Reddy, J. Ajayan, D. Godfrey, P. Prajoon and Ashok Ray, "A Numerical Investigation of Heat Suppression in HEMT for Power Electronics Application," Silicon, pp. 1–8,   2020, https://doi.org/10.1007/s12633-020-00647-3
  5. Sushanta Bordoloi, Ashok Ray and Gaurav Trivedi, "Introspection into Reliability Aspects in AlGaN/GaN HEMTs with Gate Geometry Modification," in IEEE Access, doi: 10.1109/ACCESS.2021.3096988. (2021, July)
Book Chapters
  1. Ashok Ray, Gaurav Kumar, Sushanta  Bordoloi, Dheeraj Kumar Sinha, Pratima Agarwal, & Gaurav Trivedi, "FEM Based Device Simulator for High Voltage Devices" . In International Symposium on VLSI Design and Test (pp. 127-135). Springer, Singapore. (2017, June).
  2. Sushanta Bordolo, Ashok Ray, and Gaurav Trivedi. "Simulation framework for GaN devices with special mention to reliability concern." VLSI and Post-CMOS Electronics: Devices, Circuits and Interconnects Vol-2  (2019, Sept ): pp 63-83. IET Digital Library

International Conferences:

  1. Debnath, Shreyasee; Tamuli, Manashwi; Ray, Ashok; Trivedi, Gaurav, "A review on accelerating scientific computations using the Conjugate Gradient method," Electronic Design, Computer Networks & Automated Verification (EDCAV), 2015 International Conference on , vol., no., pp.150,153, 29-30 Jan. 2015 doi: 10.1109/EDCAV.2015.7060557
  2. Ansh; Yadav, Rakesh; Deb, Debajyoti; Ray, Ashok, "Multi-purpose auto-programmable reconfigurable embedded system architecture," Electronic Design, Computer Networks & Automated Verification (EDCAV), 2015 International Conference on , vol., no., pp.48,51, 29-30 Jan. 2015 doi: 10.1109/EDCAV.2015.7060537 
  3. M. Tamuli, S. Debnath, A. Ray and S. Majumdar, "Implementation of Jacobi iterative solver in verilog HDL," 2016 2nd International Conference on Control, Instrumentation, Energy & Communication (CIEC), Kolkata, 2016, pp. 103-105, doi: 10.1109/CIEC.2016.7513747.
  4. Gaurav  Kumar, Mandeep Singh, Ashok Ray and G. Trivedi, "An FEM based framework to simulate semiconductor devices using streamline upwind Petrov-Galerkin stabilization technique," 2017 27th International Conference Radioelektronika (RADIOELEKTRONIKA), Brno, 2017, pp. 1-5, doi: 10.1109/RADIOELEK.2017.7936644.
  5. Pankaj Kumar, Syed Samsuz Zaman, Manash Pratim Sarma, Ashok Ray and Gaurav Trivedi, "Basic CMOS Gate Design by Mixed-Mode Analysis of Step-Channel TMDG-MOSFET". 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), Bhopal, 2017, (pp. 173-178),  December, 2017
  6. Syed Samsuz Zaman, Pankaj Kumar, Manash Pratim Sarma, Ashok Ray and Gaurav Trivedi, "Design and Simulation of SF-FinFET and SD-FinFET and Their Performance in Analog, RF and Digital Applications," 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), Bhopal, 2017, pp. 200-205, doi: 10.1109/iNIS.2017.49.
  7. Koushik Bharadwaj, Ashok Ray, Sushanta Bordoloi and Gaurav Trivedi, "Current Collapse Reduction Technique Using N-Doped Buffer Layer into the Bulk Region of a Gate Injection Transistor," 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID), Delhi, NCR, India, 2019, pp. 494-495, doi: 10.1109/VLSID.2019.00103.
  8. Zohmingmawia Renthlei, Sushanta Bordoloi, Ashok Ray and Chaitali Koley,”Analytical study of breakdown characteristics in AlGaN/GaN HEMT”  6th international conference on microelectronics, circuits and systems, Micro2019’ 6th and 7th July, 2019, Amity University, New Town, Kolkata , India
  9. Ashok Ray, Sushanta Bordoloi, Pratima Agarwal, Gaurav Trivedi, “Investigation of electrical aspect in lateral and vertical SiC Diodes”, poster in XXth International Workshop on Physics of Semiconductor Devices organized by S. N. Bose National Centre for Basic Sciences, Kolkata and IIT Kharagpur from 17-20 December 2019 Novotel Hotel And Residences, Kolkata, India

 

National Conference:
  1. D.Debnath, A.Choudhury, A.Chakraborty, A.K.Ray, S.Majumder.MATLAB Based Motion Detection Circuit National Conference Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT '10), . Department of Electronics, Deen Dayal Upadhyaya College, New Delhi INDIA National Conference pg TS-6.2.1-4